TC 9-62
In this instance, the output signal will not look like the input signals because Figure 7-5
shows a difference amplifier with two input signals that are equal in amplitude but 90
degrees out of phase. From the figure you can see that at time zero (T0) input number one
is at 0 volts and input number 2 is at -1 volt. The base-to-emitter bias is found to be +1
volt. This +1 volt bias signal causes the output signal to be -10 volts at time zero (T0).
Between time zero (T0) and time one (T1), both input signals go positive. The difference
between the input signals stays constant. The effect of this is to keep the bias at +1 volt for
the entire time between T0 and T1. This, in turn, keeps the output signal at -10 volts.
7-26. Between time one (T1) and time two (T2), input signal number one goes in a
negative direction but input signal number two continues to go positive. Now the
difference between the input signals decreases rapidly from +1 volt. Halfway between T1
and T2 (the dotted vertical line), input signal number one and input signal number two are
equal in amplitude. The difference between the input signals is 0 volts and this causes the
output signal to be 0 volts. From this point to T2 the difference between the input signals is
a negative value. At T2 you can compute the following:
Bias = (input signal #1) - (input signal #2)
Bias = (0 V) - (+1 V)
Bias = 1 V
7-27. From time two (T2) to time three (T3), input signal number 1 goes negative and
input signal number 2 goes to zero. The difference between them stays constant at -1 volt.
Therefore, the output signal stays at a +10-volt level for the entire time period from T2 to
T3. When computing at T3 the bias condition will be:
Bias = (input signal #1) - (input signal #2)
Bias = ( -1 V) - (0 V)
Bias = -1 V
7-28. Between T3 and T4 input signal number 1 goes to zero while input signal number
2 goes negative. This again causes a rapid change in the difference between the input
signals. Halfway between T3 and T4 (the dotted vertical line) the two input signals are
equal in amplitude. Therefore, the difference between the input signals is 0 volts, and the
output signal becomes 0 volts. From that point to T4, the difference between the input
signals becomes a positive voltage. When computing at T4 the bias condition will be:
Bias = (input signal #1) - (input signal #2)
Bias = (0 V) - ( -1 V)
Bias = +1 V
NOTE: The sequence of events from T4 toT8 is the same as those of T0 to T4.
7-8
TC 9-62
23 June 2005
Previous Page
