7-18. By time one (T1), input signal number 1 has reached +1 volt and input signal

number 2 has reached -1 volt. This is an overall increase in base-to-emitter bias of 2 volts.

Since the gain of the circuit is -10, the output signal has decreased by 20 volts. As you can

see, the output signal has been determined by the difference between the two input signals.

In fact, the base-to-emitter bias can be found by subtracting the value of input signal

number 2 from the value of input signal number 1 (compute this by using the following

equation):

Bias = (input signal #2) - (input signal #1)

Bias = ( +1 V) (-1 V)

Bias = +1 V + 1 V

Bias = +2 V

7-19. Between time one (T1) and time two (T2), input signal number 1 goes from +1 volt

to 0 volts and input signal number 2 goes from -1 volt to 0 volts. At time two (T2) both

input signals are at 0 volts and the base-to-emitter bias has returned to 0 volts. The output

signal is also 0 volts (compute this by using the following equation):

Bias = (input signal #1) - (input signal #2)

Bias = (0 V) - (0 V)

Bias = 0 V

7-20. Between time two (T2) and time three (T3), input signal number 1 goes negative

and input signal number 2 goes positive. At time three (T3), the value of the base-to-

emitter bias is -2 volts (compute this by using the following equation):

Bias = (input signal #1) - (input signal #2)

Bias = (-1 V) (+1 V)

Bias = (-1 V) + (-1 V)

Bias = -2 V

NOTE: This causes the output signal to be +20 volts at time three (T3).

7-21. Between time three (T3) and time four (T4), input signal number 1 goes from -1

volt to 0 volts and input signal number 2 goes from +1 volt to 0 volts. At time four (T4)

both input signals are 0 volts, the bias is 0 volts, and the output is 0 volts.

7-22. During time four (T4) through time eight (T8), the circuit repeats the sequence of

events that took place from time zero (T0) through time four (T4). You can see that when

the input signals are equal in amplitude and 180 degrees out of phase, the output signal is

twice as large (40 volts peak to peak) as it would be from either input signal alone (if the

other input signal were held at 0 volts). Figure 7-4 shows the two-input, single-output,

difference amplifier with two input signals that are equal in amplitude and in phase.

7-23. Notice that the output signal remains at 0 volts for the entire time (T0 through T8).

Since the two input signals are equal in amplitude and in phase, the difference between

them (the base-to-emitter bias) is always 0 volts. This causes a 0-volt output signal.